There is a known conventional configuration in which a large number of pixels arranged in rows and columns in a pixel array are divided into aperture pixels, OPB pixels, and dummy pixels in a solid-state imaging device such as a CMOS image sensor (see Patent Document 1, for example).
In this specification, an aperture pixel, an OPB pixel, and a dummy pixel are defined as follows.
An aperture pixel is a pixel that is open without any light shielding film on the light incident surface side, and generates a pixel signal by performing photoelectric conversion in accordance with incident light. Normally, such an aperture pixel is also called an effective pixel or a normal pixel. An OPB pixel is a pixel that has a light shielding film formed on the light incident surface side so that incident light is blocked, and generates a pixel signal indicating the dark current component in a state where there is no incident light. A dummy pixel is a pixel formed between an aperture pixel and an OPB pixel, to reduce the influence on the OPB pixel in a case where blooming has occurred in the aperture pixel.
FIG. 1 shows a first conventional example indicating the configuration of a solid-state imaging device in which a dummy pixel is formed between an aperture pixel and an OPB pixel.
In this solid-state imaging device 10, an aperture pixel 11 is disposed in the central region of a pixel array, an OPB pixel 12 is disposed in the marginal region, and a dummy pixel 13 is disposed between the aperture pixel 11 and the OPB pixel 12.
In the solid-state imaging device 10, a Si substrate 14 and a wiring layer 17 are stacked as a configuration to be shared by the aperture pixel 11, the OPB pixel 12, and the dummy pixel 13, and photodiodes (PDs) 15 that perform photoelectric conversion and floating diffusions (FDs) 16 that temporarily store electric charges are formed in the Si substrate 14. In the wiring layer 17, transfer gates 18 for transferring electric charges from the PDs 15 to the FDs 16 are formed.
A light shielding film 19 is formed on the light incident surface side of the OPB pixel 12 and the dummy pixel 13. Meanwhile, the light incident surface side of the aperture pixel 11 is not shielded from light, but is open.
The dummy pixel 13 is provided with a connecting portion 20 that connects the PD 15 directly to a Vdd wiring line.
In the dummy pixel 13 of the solid-state imaging device 10, the PD 15 is fixed at a constant voltage (Vdd in this case). Accordingly, in a case where blooming occurs in the aperture pixel 11, the electric charges that have flowed into the PD 15 can be released to the Vdd wiring line.
FIG. 2 shows a second conventional example indicating the configuration of a solid-state imaging device in which a dummy pixel is formed between an aperture pixel and an OPB pixel.
In this solid-state imaging device 30, an aperture pixel 31 is disposed in the central region of a pixel array, an OPB pixel 32 is disposed in the marginal region, and a dummy pixel 33 is disposed between the aperture pixel 31 and the OPB pixel 32.
In the solid-state imaging device 30, a Si substrate 14 and a wiring layer 17 are stacked as a configuration to be shared by the aperture pixel 31, the OPB pixel 32, and the dummy pixel 33. In the Si substrate 14, PDs 15 that perform photoelectric conversion, and FDs 16 that temporarily store electric charges transferred from the PDs 15 are formed. In the wiring layer 17, transfer gates 18 for transferring electric charges from the PDs 15 to the FDs 16 are formed.
A light shielding film 19 is formed on the light incident surface side of the OPB pixel 32 and the dummy pixel 33. Meanwhile, the light incident surface side of the aperture pixel 31 is not shielded from light, but is open.
In the dummy pixel 33, a connecting portion 34 that connects the FD 16 and the PD 15 is provided under the transfer gate 18.
In the dummy pixel 33 of the solid-state imaging device 30, the FD 16 and the PD 15 of a high potential are connected by the connecting portion 34. Accordingly, in a case where blooming occurs in the aperture pixel 31, the electric charges that have flowed into the PD 15 can be released through the FD 16.